Datasheet

Section 15 I
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C Bus Interface2 (IIC2) (Option)
Rev.6.00 Mar. 18, 2009 Page 642 of 980
REJ09B0050-0600
15.3.7 I
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C Bus Transmit Data Register (ICDRT)
ICDRT is an 8-bit readable/writable register that stores the transmit data. When ICDRT detects the
space in the I
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C bus shift register (ICDRS), it transfers the transmit data which is written in
ICDRT to ICDRS and starts transferring data. If the next transfer data is written to ICDRT during
transferring data of ICDRS, continuous transfer is possible. The initial value of ICDRT is H'FF.
15.3.8 I
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C Bus Receive Data Register (ICDRR)
ICDRR is an 8-bit register that stores the receive data. When data of one byte is received, ICDRR
transfers the received data from ICDRS to ICDRR and the next data can be received. ICDRR is a
receive-only register, therefore the CPU cannot be written to this register. The initial value of
ICDRR is H'FF.
15.3.9 I
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C Bus Shift Register (ICDRS)
ICDRS is a register that is used to transfer/receive data. In transmission, data is transferred from
ICDRT to ICDRS and the data is sent from the SDA pin. In reception, data is transferred from
ICDRS to ICDRR after data of one byte is received. This register cannot be read from the CPU.