Datasheet

Section 14 Serial Communication Interface (SCI, IrDA)
Rev.6.00 Mar. 18, 2009 Page 610 of 980
REJ09B0050-0600
The timing for setting the TEND flag depends on the value of the GM bit in SMR. The TEND
flag generation timing is shown in figure 14.27.
Ds D0 D1 D2 D3 D4 D5 D6 D7 DpI/O data
12.5etu
TXI
(TEND interrupt)
11.0etu
DE
Guard
time
When GM = 0
When GM = 1
Start bit
Data bits
Parity bit
Error signal
Legend:
Ds:
D0 to D7:
Dp:
DE:
Note: etu: Elementary Time Unit (time for transfer of 1 bit)
Figure 14.27 TEND Flag Generation Timing in Transmission Operation