Datasheet
Section 1 Overview
Rev.6.00 Mar. 18, 2009 Page 6 of 980
REJ09B0050-0600
TFP-120
(Top view)
91
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120
1
2
3
4
5
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15
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22
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25
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27
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30
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53
52
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40
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PG2/CS2/RAS2
PG3/CS3/RAS3
AV
CC
Vref
P40/AN0/(IRQ0)
P41/AN1/(IRQ1)
P42/AN2/(IRQ2)
P43/AN3/(IRQ3)
P44/AN4/(IRQ4)
P45/AN5/(IRQ5)
P46/AN6/(IRQ6)
P47/AN7/(IRQ7)
P94/AN12/DA2
P95/AN13/DA3
AV
SS
PG4/CS4/BREQO
PG5/BACK
PG6/BREQ
P50/TxD2/IRQ0
P51/RxD2/IRQ1
P52/SCK2/IRQ2
P53/ADTRG/IRQ3
P35/SCK1/SCL0/(OE)
P34/SCK0/SCK4/SDA0
P33/RxD1/SCL1
P32/RxD0/IrRxD/SDA1
P31/TxD1
P30/TxD0/IrTxD
MD0
MD1
V
CC
PE7/D7
V
SS
PE6/D6
PE5/D5
PE4/D4
PE3/D3
PE2/D2
PE1/D1
PE0/D0
P85/SCK3
P27/PO7/TIOCB5
P26/PO6/TIOCA5
P25/PO5/TIOCB4/TMO1
P24/PO4/TIOCA4/TMO0/RxD4
P23/PO3/TIOCD3/TMCI1/TxD4
P22/PO2/TIOCC3/TMCI0
P21/PO1/TIOCB3/TMRI1
P20/PO0/TIOCA3/TMRI0
P17/PO15/TIOCB2/TCLKD
P16/PO14/TIOCA2
P15/PO13/TIOCB1/TCLKC/DACK
1
P14/PO12/TIOCA1/DACK0
P13/PO11/TIOCD0/TCLKB/TEND
1
P12/PO10/TIOCC0/TCLKA/TEND
0
P11/PO9/TIOCB0/DREQ1
P10/PO8/TIOCA0/DREQ0
V
CL
*
2
NMI
WDTOVF
MD2
V
CC
PC0/A0
PC1/A1
PC2/A2
PC3/A3
PC4/A4
V
SS
PC5/A5
PC6/A6
PC7/A7
PB0/A8
PB1/A9
PB2/A10
PB3/A11
PB4/A12
V
SS
PB5/A13
PB6/A14
PB7/A15
PA0/A16
V
SS
PA1/A17
PA2/A18
PA3/A19
PA4/A20/IRQ4
PA5/A21/IRQ5
PA6/A22/IRQ6
PA7/A23/CS7/IRQ7
EMLE
*
1
PG1/CS1
PG0/CS0
STBY
V
SS
P81/TxD3
P83/RxD3
V
CC
V
CC
EXTAL
XTAL
V
SS
PF7/φ
PLLV
SS
RES
PLLV
CC
PF6/AS
PF5/RD
PF4/HWR
PF3/LWR
PF2/CS6/LCAS
PF1/CS5/UCA
S
PF0/WAIT/OE
PD7/D15
PD6/D14
PD5/D13
PD4/D12
PD3/D11
PD2/D10
PD1/D9
PD0/D8
Notes: 1. This is an emulator enable pin. Normally, this pin should be set to low. If this pin goes high in the flash memory version,
the on-chip emulator function is enabled. At this time, pins P53, PG4, PG5, PG6, and WDTOVF function only for the on-chip emulator.
2. A capacitor should be externally connected to the V
CL
pin.
0.1 μF (Recommended value)
33
Figure 1.4 Pin Arrangement of H8S/2368 0.18 μm F-ZTAT Group