Datasheet

Section 14 Serial Communication Interface (SCI, IrDA)
Rev.6.00 Mar. 18, 2009 Page 596 of 980
REJ09B0050-0600
14.6.2 SCI Initialization (Clocked Synchronous Mode)
Before transmitting and receiving data, you should first clear the TE and RE bits in SCR to 0, then
initialize the SCI as described in a sample flowchart in figure 14.15. Do not write to SMR, SCMR,
IrCR, or SEMR while the SCI is operating. This also applies to writing the same data as the
current register contents. When the operating mode, transfer format, etc., is changed, the TE and
RE bits must be cleared to 0 before making the change. When the TE bit is cleared to 0, the
TDRE flag is set to 1. Note that clearing the RE bit to 0 does not change the contents of the
RDRF, PER, FER, and ORER flags, or the contents of RDR.
Wait
<Transfer start>
Start of initialization
Set data transfer format in
SMR and SCMR
No
Yes
Set value in BRR
Clear TE and RE bits in SCR to 0
[2]
[3]
Set TE and RE bits in SCR to 1, and
set RIE, TIE, TEIE, and MPIE bits
Note: In simultaneous transmit and receive operations, the TE and RE bits should
both be cleared to 0 or set to 1 simultaneously.
[4]
1-bit interval elapsed?
Set CKE1 and CKE0 bits in SCR
(TE, RE bits 0)
[1]
[1] Set the clock selection in SCR. Be sure
to clear bits RIE, TIE, TEIE, and MPIE,
TE and RE, to 0.
[2] Set the data transfer format in SMR
and SCMR.
[3] Write a value corresponding to the bit
rate to BRR. (Not necessary if an
external clock is used.)
[4] Wait at least one bit interval, then set
the TE and RE bits in SCR to 1.
Also set the RIE, TIE, TEIE, and MPIE
bits.
Setting the TE and RE bits enable the
TxD and RxD pins to be used.
Figure 14.15 Sample SCI Initialization Flowchart