Datasheet

Section 14 Serial Communication Interface (SCI, IrDA)

Rev.6.00 Mar. 18, 2009 Page 562 of 980

REJ09B0050-0600

Bit Bit Name Initial Value R/W Description

2 TEND 1 R Transmit End

This bit is set to 1 when no error signal has been

sent back from the receiving end and the next

transmit data is ready to be transferred to TDR.

[Setting conditions]

• When the TE bit in SCR is 0 and the ERS bit

is also 0

• If the ERS bit is 0 and the TDRE bit is 1 after

the specified interval after transmission of 1-

byte data

Timing to set this bit differs according to the

GM = 0, BLK = 0: 2.5 etu*

after transmission

GM = 0, BLK = 1: 1.5 etu*

after transmission

GM = 1, BLK = 0: 1.0 etu*

after transmission

GM = 1, BLK = 1: 1.0 etu*

after transmission

[Clearing conditions]

• When 0 is written to TEND after reading

TEND = 1

• When the DMAC or DTC is activated by a TXI

interrupt and writes data to TDR

1 MPB 0 R Multiprocessor Bit

This bit is not used in Smart Card interface

mode.

0 MPBT 0 R/W Multiprocessor Bit Transfer

Write 0 to this bit in Smart Card interface mode.

Notes: 1. Only 0 can be written, to clear the flag. Alternately, use the bit clear instruction to clear

the flag.

2. etu: Elementary Time Unit: (time for transfer of 1 bit)