Datasheet

Section 13 Watchdog Timer
Rev.6.00 Mar. 18, 2009 Page 530 of 980
REJ09B0050-0600
Overflow
Interrupt
control
WOVI
(interrupt request
signal)
Internal reset signal*
WDTOVF
Reset
control
RSTCSR TCNT TSCR
φ/2
φ/64
φ/128
φ/512
φ/2048
φ/8192
φ/32768
φ/131072
Clock
Clock
select
Internal clock
sources
Bus
interface
Module bus
TCSR:
TCNT:
RSTCSR:
Note: * An internal reset signal can be generated by the register setting.
Timer control/status register
Timer counter
Reset control/status register
WDT
Legend:
Internal bus
Figure 13.1 Block Diagram of WDT
13.2 Input/Output Pin
Table 13.1 describes the WDT output pin.
Table 13.1 Pin Configuration
Name Symbol I/O Function
Watchdog timer overflow WDTOVF Output Outputs counter overflow signal in watchdog
timer mode