Datasheet

Rev.6.00 Mar. 18, 2009 Page lvii of lviii
REJ09B0050-0600
Table 25.30 Clock Timing.......................................................................................................... 930
Table 25.31 Control Signal Timing............................................................................................ 931
Table 25.32 Bus Timing (1) ....................................................................................................... 932
Table 25.33 Bus Timing (2) ....................................................................................................... 934
Table 25.34 DMAC Timing ....................................................................................................... 935
Table 25.35 Timing of On-Chip Peripheral Modules................................................................. 936
Table 25.36 A/D Conversion Characteristics............................................................................. 938
Table 25.37 D/A Conversion Characteristics............................................................................. 938
Table 25.38 Flash Memory Characteristics (0.18-μm F-ZTAT Version) .................................. 939
Appendix
Table D.1
Execution State of Instructions............................................................................... 954