Datasheet

Section 12 8-Bit Timers (TMR)
Rev.6.00 Mar. 18, 2009 Page 514 of 980
REJ09B0050-0600
Bit Bit Name Initial Value R/W Description
1
0
OS1
OS0
0
0
R/W
R/W
Output Select 1 and 0
These bits select a method of TMO pin output
when compare match A of TCORA and TCNT
occurs.
00: No change when compare match A occurs
01: 0 is output when compare match A occurs
10: 1 is output when compare match A occurs
11: Output is inverted when compare match A
occurs (toggle output)
Note: * Only 0 can be written to bits 7 to 5, to clear these flags.
TCSR_1
Bit Bit Name Initial Value R/W Description
7 CMFB 0 R/(W)
*
Compare Match Flag B
[Setting condition]
Set when TCNT matches TCORB
[Clearing conditions]
• Cleared by reading CMFB when CMFB = 1,
then writing 0 to CMFB
• When DTC is activated by CMIB interrupt
while DISEL bit of MRB in DTC is 0
6 CMFA 0 R/(W)
*
Compare Match Flag A
[Setting condition]
Set when TCNT matches TCORA
[Clearing conditions]
• Cleared by reading CMFA when CMFA = 1,
then writing 0 to CMFA
• When DTC is activated by CMIA interrupt
while DISEL bit of MRB in DTC is 0
5 OVF 0 R/(W)
*
Timer Overflow Flag
[Setting condition]
Set when TCNT overflows from H'FF to H'00
[Clearing condition]
Cleared by reading OVF when OVF = 1, then
writing 0 to OVF