Datasheet

Section 12 8-Bit Timers (TMR)
Rev.6.00 Mar. 18, 2009 Page 513 of 980
REJ09B0050-0600
Bit Bit Name Initial Value R/W Description
6 CMFA 0 R/(W)
*
Compare Match Flag A
[Setting condition]
Set when TCNT matches TCORA
[Clearing conditions]
• Cleared by reading CMFA when CMFA = 1,
then writing 0 to CMFA
• When DTC is activated by CMIA interrupt
while DISEL bit of MRB in DTC is 0
5 OVF 0 R/(W)
*
Timer Overflow Flag
[Setting condition]
Set when TCNT overflows from H'FF to H'00
[Clearing condition]
Cleared by reading OVF when OVF = 1, then
writing 0 to OVF
4 ADTE 0 R/W A/D Trigger Enable
Selects enabling or disabling of A/D converter
start requests by compare match A.
0: A/D converter start requests by compare
match A are disabled
1: A/D converter start requests by compare
match A are enabled
3
2
OS3
OS2
0
0
R/W
R/W
Output Select 3 and 2
These bits select a method of TMO pin output
when compare match B of TCORB and TCNT
occurs.
00: No change when compare match B occurs
01: 0 is output when compare match B occurs
10: 1 is output when compare match B occurs
11: Output is inverted when compare match B
occurs (toggle output)