Datasheet

Section 12 8-Bit Timers (TMR)
Rev.6.00 Mar. 18, 2009 Page 509 of 980
REJ09B0050-0600
12.2 Input/Output Pins
Table 12.1 summarizes the pins of the 8-bit timer module.
Table 12.1 Pin Configuration
Channel Name Symbol I/O Function
0 Timer output pin TMO0 Output Outputs at compare match
Timer clock input pin TMCI0 Input Inputs external clock for counter
Timer reset input pin TMRI0 Input Inputs external reset to counter
1 Timer output pin TMO1 Output Outputs at compare match
Timer clock input pin TMCI1 Input Inputs external clock for counter
Timer reset input pin TMRI1 Input Inputs external reset to counter
12.3 Register Descriptions
The 8-bit timer module has the following registers. For details on the module stop control register,
refer to section 23.1.2, Module Stop Control Registers H, L (MSTPCRH, MSTPCRL).
• Timer counter_0 (TCNT_0)
• Time constant register A_0 (TCORA_0)
• Time constant register B_0 (TCORB_0)
• Timer control register_0 (TCR_0)
• Timer control/status register_0 (TCSR_0)
• Timer counter_1 (TCNT_1)
• Time constant register A_1 (TCORA_1)
• Time constant register B_1 (TCORB_1)
• Timer control register_1 (TCR_1)
• Timer control/status register_1 (TCSR_1)
12.3.1 Timer Counter (TCNT)
TCNT is 8-bit up-counter. TCNT_0 and TCNT_1 comprise a single 16-bit register so they can be
accessed together by a word transfer instruction. Bits CKS2 to CKS0 in TCR are used to select a
clock. TCNT can be cleared by an external reset input or by a compare match signal A or B.
Which signal is to be used for clearing is selected by bits CCLR1 and CCLR0 in TCR. When
TCNT overflows from H'FF to H'00, OVF in TCSR is set to 1. TCNT is initialized to H'00.