Datasheet

Section 11 Programmable Pulse Generator (PPG)
Rev.6.00 Mar. 18, 2009 Page 490 of 980
REJ09B0050-0600
11.3.3 Next Data Registers H, L (NDRH, NDRL)
NDRH, NDRL store the next data for pulse output. The NDR addresses differ depending on
whether pulse output groups have the same output trigger or different output triggers.
NDRH
If pulse output groups 2 and 3 have the same output trigger, all eight bits are mapped to the same
address and can be accessed at one time, as shown below.
Bit Bit Name Initial Value R/W Description
7
6
5
4
3
2
1
0
NDR15
NDR14
NDR13
NDR12
NDR11
NDR10
NDR9
NDR8
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Next Data Register 15 to 8
The register contents are transferred to the
corresponding PODRH bits by the output trigger
specified with PCR.
If pulse output groups 2 and 3 have different output triggers, upper 4 bits and lower 4 bits are
mapped to the different addresses as shown below.
Bit Bit Name Initial Value R/W Description
7
6
5
4
NDR15
NDR14
NDR13
NDR12
0
0
0
0
R/W
R/W
R/W
R/W
Next Data Register 15 to 12
The register contents are transferred to the
corresponding PODRH bits by the output trigger
specified with PCR.
3
to
0
— All 1 Reserved
These bits are always read as 1 and cannot be
modified.