Datasheet
Section 10 16-Bit Timer Pulse Unit (TPU)
Rev.6.00 Mar. 18, 2009 Page 448 of 980
REJ09B0050-0600
Table 10.28 Register Combinations in Buffer Operation
Channel Timer General Register Buffer Register
0 TGRA_0 TGRC_0
TGRB_0 TGRD_0
3 TGRA_3 TGRC_3
TGRB_3 TGRD_3
• When TGR is an output compare register
When a compare match occurs, the value in the buffer register for the corresponding channel is
transferred to the timer general register.
This operation is illustrated in figure 10.12.
Buffer register
Timer general
register
TCNTComparator
Compare match signal
Figure 10.12 Compare Match Buffer Operation
• When TGR is an input capture register
When input capture occurs, the value in TCNT is transferred to TGR and the value previously
held in the timer general register is transferred to the buffer register.
This operation is illustrated in figure 10.13.
Buffer register
Timer general
register
TCNT
Input capture
signal
Figure 10.13 Input Capture Buffer Operation