Datasheet

Section 9 I/O Ports
Rev.6.00 Mar. 18, 2009 Page 366 of 980
REJ09B0050-0600
9.8.2 Port A Data Register (PADR)
PADR stores output data for the port A pins.
Bit Bit Name Initial Value R/W Description
7 PA7DR 0 R/W
6 PA6DR 0 R/W
Output data for a pin is stored when the pin function
is specified to a general purpose I/O.
5 PA5DR 0 R/W
4 PA4DR 0 R/W
3 PA3DR 0 R/W
2 PA2DR 0 R/W
1 PA1DR 0 R/W
0 PA0DR 0 R/W
9.8.3 Port A Register (PORTA)
PORTA shows port A pin states.
PORTA cannot be modified.
Bit Bit Name Initial Value R/W Description
7 PA7 —
*
R
6 PA6 —
*
R
5 PA5 —
*
R
4 PA4 —
*
R
If a port A read is performed while PADDR bits are
set to 1, the PADR values are read. If a port A read
is performed while PADDR bits are cleared to 0, the
pin states are read.
3 PA3 —
*
R
2 PA2 —
*
R
1 PA1 —
*
R
0 PA0 —
*
R
Note: * Determined by the states of pins PA7 to PA0.