Datasheet

Section 9 I/O Ports
Rev.6.00 Mar. 18, 2009 Page 358 of 980
REJ09B0050-0600
9.5.3 Port 5 Register (PORT5)
PORT5 shows the pin states. PORT5 cannot be modified.
Bit Bit Name Initial Value R/W Description
7
to
4
— Undefined R Reserved
Undefined values are read from these bits.
3 P53 —
*
R
2 P52 —
*
R
1 P51 —
*
R
0 P50 —
*
R
If bits P53 to P50 are read while P5DDR bits are set
to 1, the P5DR values are read. If a port 5 read is
performed while P5DDR bits are cleared to 0, the
pin states are read.
Note: * Determined by the states of pins P53 to P50.
9.5.4 Pin Functions
Port 5 pins also function as the pins for SCI I/Os, A/D converter inputs, and interrupt inputs. The
correspondence between the register specification and the pin functions is shown below.
• P53/ADTRG/IRQ3
The pin function is switched as shown below according to the combination of bits TRGS1 and
TRGS0 in the A/D control register (ADCR), bit ITS3 in ITSR, and bit P53DDR.
P53DDR 0 1
Pin function P53 input P53 output
ADTRG input
*
1
IRQ3 interrupt input
*
2
Notes: 1. ADTRG input when TRGS1 = TRGS0 = 1.
2. IRQ3 input when ITS3 = 0.