Datasheet

Section 9 I/O Ports
Rev.6.00 Mar. 18, 2009 Page 352 of 980
REJ09B0050-0600
• P34/SCK0/SCK4/SDA0
The pin function is switched as shown below according to the combination of bit ICE in ICCRA
of I
2
C_0, bit C/A in SMR, bits CKE0 and CKE1 in SCR, and bit P34DDR.
ICE 0 1
CKE1 0 1 —
C/A 0 1 — —
CKE0 0 1 — — —
P34DDR 0 1 — — — —
Pin function P34
input
P34
output
*
1
SCK0/SCK4
output
*
1
*
3
SCK0/SCK4
output
*
1
*
3
SCK0/SCK4
input
SDA0
I/O
*
2
Notes: 1. NMOS open-drain output when P34ODR = 1.
2. NMOS open-drain output regardless of P34ODR
3. Simultaneous output of SCK0 and SCK4 cannot be set.
• P33/RxD1/SCL1
The pin function is switched as shown below according to the combination of bit ICE in ICCRA
of I
2
C_0, bit RE in SCR of SCI_1 and bit P33DDR.
ICE 0 1
RE 0 1 —
P33DDR 0 1 — —
Pin function P33 input P33 output
*
1
RxD1 input SCL1 I/O
*
2
Notes: 1. NMOS open-drain output when P33ODR = 1.
2. NMOS open-drain output regardless of P33ODR
• P32/RxD0/IrRxD/SDA1
The pin function is switched as shown below according to the combination of bit ICE in ICCRA
of I
2
C_0, bit RE in SCR of SCI_0 and bit P32DDR.
ICE 0 1
RE 0 1 —
P32DDR 0 1 — —
Pin function P32 input P32 output
*
1
RxD0/IrRxD
input
SDA1 I/O
*
2
Notes: 1. NMOS open-drain output when P32ODR = 1.
2. NMOS open-drain output regardless of P32ODR