Datasheet

Section 9 I/O Ports
Rev.6.00 Mar. 18, 2009 Page 345 of 980
REJ09B0050-0600
• P21/PO1/TIOCB3/TMRI1
The pin function is switched as shown below according to the combination of the TPU channel
3 settings (by bits MD3 to MD0 in TMDR_3, bits IOB3 to IOB0 in TIORH_3, and bits
CCLR2 to CCLR0 in TCR_3), bit NDER1 in NDERL, and bit P21DDR.
TPU channel 3
settings
(1) in table below (2) in table below
P21DDR — 0 1 1
NDER1 — — 0 1
P21 input P21 output PO1 output TIOCB3 output
TIOCB3 input
*
1
Pin function
TMRI1 input
*
2
Notes: 1. TIOCB3 input when MD3 to MD0 = B'0000 and IOB3 to IOB0 = B'10××.
2. When used as the TMR counter reset pin, set both the CCLR1 and CCLR0 bits in
TCR_1 to 1.
TPU channel 3
settings
(2) (1) (2) (2) (1) (2)
MD3 to MD0 B'0000 B'0010 B'0011
IOB3 to IOB0 B'0000
B'0100
B'1×××
B'0001 to
B'0011
B'0101 to
B'0111
— B'××00 Other than B'××00
CCLR2 to
CCLR0
— — — — Other than
B'010
B'010
Output function — Output
compare
output
— — PWM mode
2 output
—
Legend:
×: Don’t care