Datasheet

Section 9 I/O Ports
Rev.6.00 Mar. 18, 2009 Page 344 of 980
REJ09B0050-0600
• P22/PO2/TIOCC3/TMCI0
The pin function is switched as shown below according to the combination of the TPU channel
3 settings (by bits MD3 to MD0 in TMDR_3, bits IOC3 to IOC0 in TIORL_3, and bits CCLR2
to CCLR0 in TCR_3), bit NDER2 in NDERL, and bit P22DDR.
TPU channel 3
settings
(1) in table below (2) in table below
P22DDR — 0 1 1
NDER2 — — 0 1
P22 input P22 output PO2 output TIOCC3 output
TIOCC3 input
*
1
Pin function
TMCI0 input
*
2
Notes: 1. TIOCC3 input when MD3 to MD0 = B'0000 and IOC3 to IOC0 = B'10××.
2. When used as the TMR external clock input pin, the external clock is selected by the
CKS2 to CKS0 bits in TCR_1.
TPU channel 3
settings
(2) (1) (2) (1) (1) (2)
MD3 to MD0 B'0000 B'001× B'0010 B'0011
IOC3 to IOC0 B'0000
B'0100
B'1×××
B'0001 to
B'0011
B'0101 to
B'0111
B'××00 Other than
B'××00
Other than B'××00
CCLR2 to
CCLR0
— — — — Other than
B'101
B'101
Output function — Output
compare
output
— PWM
*
3
mode 1
output
PWM mode
2 output
—
Legend:
×: Don’t care
Note: 3. TIOCD3 output disabled.
Output disabled and settings (2) effective when BFA = 1 or BFB = 1 in TMDR_3.