Datasheet

Section 9 I/O Ports
Rev.6.00 Mar. 18, 2009 Page 343 of 980
REJ09B0050-0600
• P23/PO3/TIOCD3/TXD4/TMCI1
The pin function is switched as shown below according to the combination of the TPU channel
3 settings (by bits MD3 to MD0 in TMDR_3, bits IOD3 to IOD0 in TIORL_3, and bits
CCLR2 to CCLR0 in TCR_3), bit NDER3 in NDERL, bit TE in SCR of SCI_4, and bit
P23DDR.
TPU channel 3
settings
(1) in table below (2) in table below
TE 0 1
P23DDR — 0 1 1 —
NDER3 — — 0 1 —
P23 input P23 output PO3 output TIOCD3 output
TIOCD3 input
*
1
TxD4 output
Pin function
TMCI1 input
*
2
Notes: 1. TIOCD3 input when MD3 to MD0 = B'0000 and IOD3 to IOD0 = B'10××.
2. When used as the TMR external clock input pin, the external clock is selected by the
CKS2 to CKS0 bits in TCR1.
TPU channel 3
settings
(2) (1) (2) (2) (1) (2)
MD3 to MD0 B'0001 to B'0011 B'0010 B'0011
IOD3 to IOD0 B'0000
B'0100
B'1×××
B'0001 to
B'0011
B'0101 to
B'0111
— B'××00 Other than B'××00
CCLR2 to
CCLR0
— — — — Other than
B'110
B'110
Output function — Output
compare
output
— — PWM mode
2 output
—
Legend:
×: Don’t care