Datasheet

Section 9 I/O Ports
Rev.6.00 Mar. 18, 2009 Page 342 of 980
REJ09B0050-0600
• P24/PO4/TIOCA4/RxD4/TMO0
The pin function is switched as shown below according to the combination of the TPU channel
4 settings (by bits MD3 to MD0 in TMDR_4, bits IOA3 to IOA0 in TIOR_4, and bits CCLR1
and CCLR0 in TCR4), bit NDER4 in NDERL, bit RE in SCI_4, bit P24DDR, and bit OS3 to
OS0 in TCSRO of TMR.
RE 0 1
TPU channel 4
settings
(1) in table below (2) in table below —
OS3 to OS0 All 0 Not all 0 —
P24DDR — 0 1 1 — —
NDER4 — — 0 1 — —
P24
input
P24
output
PO4
output
TMO0
output
Pin function TIOCA4 output
TIOCA4 input
*
1
RXD4 input
Note: 1. TIOCA4 input when MD3 to MD0 = B'0000 or B'01×× and IOA3 to IOA0 = B'10××.
TPU channel 4
settings
(2) (1) (2) (1) (1) (2)
MD3 to MD0 B'0000 to B'01×× B'001× B'0010 B'0011
IOA3 to IOA0 B'0000
B'0100
B'1×××
B'0001 to
B'0011
B'0101 to
B'0111
B'××00 Other than
B'××00
Other than B'××00
CCLR1, CCLR0 — — — — Other than
B'01
B'01
Output function — Output
compare
output
— PWM
*
2
mode 1
output
PWM mode
2 output
—
Legend:
×: Don’t care
Note: 2. TIOCB4 output disabled.