Datasheet

Section 9 I/O Ports
Rev.6.00 Mar. 18, 2009 Page 335 of 980
REJ09B0050-0600
• P11/PO9/TIOCB0/DREQ1
The pin function is switched as shown below according to the combination of the TPU channel
0 settings (by bits MD3 to MD0 in TMDR_0, bits IOB3 to IOB0 in TIORH_0, and bits
CCLR2 to CCLR0 in TCR_0), bit NDER9 in NDERH, and bit P11DDR.
TPU channel 0
settings
(1) in table below (2) in table below
P11DDR — 0 1 1
NDER9 — — 0 1
P11 input P11 output PO9 output TIOCB0 output
TIOCB0 input
*
Pin function
DREQ1 input
Note: * TIOCB0 input when MD3 to MD0 = B'0000 and IOB3 to IOB0 = B'10××.
TPU channel 0
settings
(2) (1) (2) (2) (1) (2)
MD3 to MD0 B'0000 B'0010 B'0011
IOB3 to IOB0 B'0000
B'0100
B'1×××
B'0001 to
B'0011
B'0101 to
B'0111
— B'××00 Other than B'××00
CCLR2, CCLR0 — — — — Other than
B'010
B'010
Output function — Output
compare
output
— — PWM mode
2 output
—
Legend:
×: Don’t care