Datasheet

Section 9 I/O Ports
Rev.6.00 Mar. 18, 2009 Page 332 of 980
REJ09B0050-0600
• P14/PO12/TIOCA1/DACK0
The pin function is switched as shown below according to the combination of the TPU channel
1 settings (by bits MD3 to MD0 in TMDR_1, bits IOA3 to IOA0 in TIOR_1, and bits CCLR1
and CCLR0 in TCR_1), bit NDER12 in NDERH, bit SAE0 in DMABCRH and bit P14DDR.
SAE0 0 1 1
TPU channel 1
settings
(1) in table below (2) in table below —
P14DDR — 0 1 1 —
NDER12 — — 0 1 —
P14 input P14 output PO12 output Pin function TIOCB1 output
TIOCA1 input
*
1
DACK0
output
Note: 1. TIOCA1 input when MD3 to MD0 = B'0000, and B'01×× and IOA3 to IOA0 = B'10××.
TPU channel 1
settings
(2) (1) (2) (1) (1) (2)
MD3 to MD0 B'0000, B'01×× B'001× B'0010 B'0011
IOA3 to IOA0 B'0000
B'0100
B'1×××
B'0001 to
B'0011
B'0101 to
B'0111
B'××00 Other
than B'××00
Other than B'××00
CCLR1, CCLR0 — — — — Other than
B'01
B'01
Output function — Output
compare
output
— PWM
*
2
mode 1
output
PWM mode
2 output
—
Legend:
×: Don’t care
Note: 2. TIOCB1 output disabled.