Datasheet

Section 8 Data Transfer Controller (DTC)
Rev.6.00 Mar. 18, 2009 Page 308 of 980
REJ09B0050-0600
Table 8.3 Chain Transfer Conditions
1st Transfer 2nd Transfer
CHNE CHNS DISEL CR CHNE CHNS DISEL CR DTC Transfer
0 — 0 Not 0 — — — — Ends at 1st transfer
0 — 0 0 — — — — Ends at 1st transfer
0 — 1 — — — — — Interrupt request to CPU
1 0 — — 0 — 0 Not 0 Ends at 2nd transfer
0 — 0 0 Ends at 2nd transfer
0 — 1 — Interrupt request to CPU
1 1 0 Not 0 — — — — Ends at 1st transfer
1 1 — 0 0 — 0 Not 0 Ends at 2nd transfer
0 — 0 0 Ends at 2nd transfer
0 — 1 — Interrupt request to CPU
1 1 1 Not 0 — — — — Ends at 1st transfer
Interrupt request to CPU
8.5.1 Normal Mode
In normal mode, one operation transfers one byte or one word of data. Table 8.4 lists the register
function in normal mode. From 1 to 65,536 transfers can be specified. Once the specified number
of transfers has ended, a CPU interrupt can be requested.
Table 8.4 Register Function in Normal Mode
Name Abbreviation Function
DTC source address register SAR Designates source address
DTC destination address register DAR Designates destination address
DTC transfer count register A CRA Designates transfer count
DTC transfer count register B CRB Not used