Datasheet
Section 7 DMA Controller (DMAC) 
Rev.6.00 Mar. 18, 2009 Page 243 of 980 
REJ09B0050-0600 
Note:  *  If the relevant port is set as an output pin for another function, DMA transfers using the 
channel in question cannot be guaranteed. 
7.4.3 Activation by Auto-Request 
Auto-request is activated by register setting only, and transfer continues to the end. With auto-
request activation, cycle steal mode or burst mode can be selected. 
In cycle steal mode, the DMAC releases the bus to another bus master each time a byte or word is 
transferred. DMA and CPU cycles are usually repeated alternately. In burst mode, the DMAC 
keeps possession of the bus until the end of the transfer so that transfer is performed continuously. 










