Datasheet

Section 7 DMA Controller (DMAC)
Rev.6.00 Mar. 18, 2009 Page 230 of 980
REJ09B0050-0600
Full Address Mode:
• DMABCRH
Bit Bit Name Initial Value R/W Description
15 FAE1 0 R/W Full Address Enable 1
Specifies whether channel 1 is to be used in
short address mode or full address mode.
In full address mode, channels 1A and 1B are
used together as channel 1.
0: Short address mode
1: Full address mode
14 FAE0 0 R/W Full Address Enable 0
Specifies whether channel 0 is to be used in
short address mode or full address mode.
In full address mode, channels 0A and 0B are
used together as channel 0.
0: Short address mode
1: Full address mode
13,
12
— All 0 R/W
R/W
Reserved
Though these bits can be read from or written to,
the write value should always be 0.