Datasheet
Section 5 Interrupt Controller 
Rev.6.00 Mar. 18, 2009 Page 112 of 980 
REJ09B0050-0600 
5.6.3  Interrupt Exception Handling Sequence 
Figure 5.5 shows the interrupt exception handling sequence. The example shown is for the case 
where interrupt control mode 0 is set in advanced mode, and the program area and stack area are 
in on-chip memory. 










