Datasheet

Section 5 Interrupt Controller
Rev.6.00 Mar. 18, 2009 Page 96 of 980
REJ09B0050-0600
5.3.4 IRQ Sense Control Register L (ISCRL)
ISCRL select the source that generates an interrupt request at pins IRQ7 to IRQ0.
Bit Bit Name Initial Value R/W Description
15
14
IRQ7SCB
IRQ7SCA
0
0
R/W
R/W
IRQ7 Sense Control B
IRQ7 Sense Control A
00: Interrupt request generated at IRQ7 input
low level
01: Interrupt request generated at falling edge of
IRQ7 input
10: Interrupt request generated at rising edge of
IRQ7 input
11: Interrupt request generated at both falling
and rising edges of IRQ7 input
13
12
IRQ6SCB
IRQ6SCA
0
0
R/W
R/W
IRQ6 Sense Control B
IRQ6 Sense Control A
00: Interrupt request generated at IRQ6 input
low level
01: Interrupt request generated at falling edge of
IRQ6 input
10: Interrupt request generated at rising edge of
IRQ6 input
11: Interrupt request generated at both falling
and rising edges of IRQ6 input
11
10
IRQ5SCB
IRQ5SCA
0
0
R/W
R/W
IRQ5 Sense Control B
IRQ5 Sense Control A
00: Interrupt request generated at IRQ5 input
low level
01: Interrupt request generated at falling edge of
IRQ5 input
10: Interrupt request generated at rising edge of
IRQ5 input
11: Interrupt request generated at both falling
and rising edges of IRQ5 input