Datasheet

Rev.6.00 Mar. 18, 2009 Page xi of lviii
REJ09B0050-0600
Item Page Revision (See Manual for Details)
9.13.4 Pin Functions 391 Table amended
• PF7/φ
(Before) PFDDR → (After) PF7DDR
393 Table amended
• PF1/CS5/UCAS
PF1DDR — 0 1 0 1 0 1 — 0101
Pin function UCAS
output
PF1
input
CS5
output
PF1
input
PF1
output
PF1
input
PF1
output
UCAS
output
PF1
input
CS5
output
PF1
input
PF1
output
14.3.7 Serial Status
Register (SSR)
Normal Serial
Communication Interface
Mode (When SMIF in
SCMR is 0)
558 Note amended
Note: * Only 0 can be written, to clear the flag. Alternately,
use the bit clear instruction to clear the flag.
Smart Card Interface
Mode (When SMIF in
SCMR is 1)
562 Note amended
Notes: 1. Only 0 can be written, to clear the flag. Alternately,
use the bit clear instruction to clear the flag.
2. etu: Elementary Time Unit: (time for transfer of 1
bit)
14.3.9 Bit Rate Register
(BRR)
Table 14.3 BRR Settings
for Various Bit Rates
(Asynchronous Mode)
565 Table amended
Operating Frequency φ
φ
(MHz)
8 9.8304 10 12
Bit Rate
(bit/s) n N
Error
(%) n N
Error
(%) n N
Error
(%) n N
Error
(%)
9600 0 25 0.16 0 31 0.00 0 32 –1.36 0 38 0.16
19200 0 12 0.16 0 15 0.00 0 15 –1.73 0 19 –2.34
31250 0 7 0.00 0 9 –1.70 0 9 0.00 0 11 0.00
38400 — — — 0 7 0.00 0 7 –1.73 0 9 –2.34
Operating Frequency
φ
(MHz)
12.288 14 14.7456 16
Bit Rate
(bit/s)
n N
Error
(%) n N
Error
(%) n N
Error
(%) n N
Error
(%)
9600 0 39 0.00 0 45 –0.93 0 47 0.00 0 51 0.16
19200 0 19 0.00 0 22 –0.93 0 23 0.00 0 25 0.16
31250 0 11 2.40 0 13 0.00 0 14 –1.70 0 15 0.00
38400 0 9 0.00 — — — 0 11 0.00 0 12 0.16