Datasheet

Section 3 MCU Operating Modes
Rev.6.00 Mar. 18, 2009 Page 68 of 980
REJ09B0050-0600
ROM: 384 kbytes
RAM: 32 kbytes
Mode 5
(User boot mode)
H'000000
H'FFFC00
H'FFFFFF
H'FFFF00
H'FFFF20
H'080000H'080000
External address
space/
reserved area
*
2
*
4
H'FF4000
H'FFC000
H'FFD000
*
5
Reserved area
*
4
External address space/
reserved area
*
2
*
4
External address space/
reserved area
*
2
*
4
Internal I/O registers
Internal I/O registers
Notes: 1. This area is specified as the external address space by clearing the RAME bit in SYSCR to 0.
2. When EXPE = 1, external address space; when EXPE = 0, reserved area.
3. When EXPE = 1, external address space with RAME = 0, on-chip RAM with RAME = 1.
When EXPE = 0, on-chip RAM.
H'FF4000
H'FFC000
H'FFD000
Reserved area
*
4
ROM: 384 kbytes
RAM: 32 kbytes
Mode 4
(Expanded mode with
on-chip ROM enabled)
H'000000
H'FFFC00
On-chip ROM On-chip ROM
H'FFFFFF
H'FFFF00
H'FFFF20
External address
space
Internal I/O registers
Internal I/O registers
External address space
External address space
On-chip RAM/
external address
space
*
1
On-chip RAM
4. A reserved area should not be accessed.
5. The on-chip RAM is used to program the flash memory. The RAME bit in SYSCR should not be cleared to 0.
ROM: 384 kbytes
RAM: 32 kbytes
Mode 7
(Single-chip activation
expanded mode,
with on-chip ROM enabled)
H'000000
H'FFFC00
H'FFFFFF
H'FFFF00
H'FFFF20
H'080000
H'060000H'060000 H'060000
External address
space/
reserved area
*
2
*
4
H'FF4000
H'FFC000
H'FFD000
*
3
Reserved area
*
4
External address space /
reserved area
*
2
*
4
External address space /
reserved area
*
2
*
4
Internal I/O registers
Internal I/O registers
On-chip ROM
Reserved area
*
4
Reserved area
*
4
Reserved area
*
4
On-chip RAM/
external address
space
Figure 3.6 H8S/2364F Memory Map (2)