Datasheet

Section 3 MCU Operating Modes
Rev.6.00 Mar. 18, 2009 Page 58 of 980
REJ09B0050-0600
3.2 Register Descriptions
The following registers are related to the operating mode.
Mode control register (MDCR)
System control register (SYSCR)
3.2.1 Mode Control Register (MDCR)
MDCR monitors the current operating mode of this LSI.
Bit Bit Name Initial Value R/W Descriptions
7 to
3
All 0
Reserved
These bits are always read as 0 and cannot be
modified.
2
1
0
MDS2
MDS1
MDS0
*
*
*
R
R
R
Mode Select 2 to 0
These bits indicate the input levels at pins MD2 to
MD0 (the current operating mode). Bits MDS2 to
MDS0 correspond to MD2 to MD0. MDS2 to MDS0
are read-only bits and they cannot be written to. The
mode pin (MD2 to MD0) input levels are latched into
these bits when MDCR is read. These latches are
canceled by a reset.
Note: * Determined by pins MD2 to MD0.
3.2.2 System Control Register (SYSCR)
SYSCR controls CPU access to the flash memory control registers, sets external bus mode, and
enables or disables on-chip RAM.