Datasheet

Section 2 CPU
Rev.6.00 Mar. 18, 2009 Page 53 of 980
REJ09B0050-0600
Table 2.13 Effective Address Calculation
No
1
Offset
1
2
4
r
op
31
0
31 23
2
3
Register indirect with d
isplacement
@(d:16,ERn) or @(d:32,ERn)
4
r
op
disp
r
op
rm
op
rn
31
0
31
0
r
op
Don't care
31
23
31
0
Don't care
31
0
disp
31
0
31
0
31
23
31
0
Don't care
31
23
31
0
Don't care
24
24
24
24
Addressing Mode and Instruction Format Effective Address Calculation Effective Address (EA)
Register direct (Rn)
General register contents
General register contents
General register contents
General register contents
Sign extension
Register indirect (@ERn)
Register indirect with post-increment or
pre-decrement
•Register indirect with post-increment @ERn+
•Register indirect with pre-decrement @-ERn
1, 2, or 4
1, 2, or 4
Operand Size
Byte
Word
Longword
Operand is general register contents.