Datasheet

Index
Rev.6.00 Mar. 18, 2009 Page 975 of 980
REJ09B0050-0600
Index
16-Bit Timer Pulse Unit.......................... 401
Buffer Operation................................. 447
Cascaded Operation ............................ 452
Input Capture Function ....................... 444
Phase Counting Mode......................... 459
PWM Modes....................................... 454
Synchronous Operation....................... 445
8-Bit Timer
16-Bit Counter Mode.......................... 520
Compare Match Count Mode ............. 520
Operation with Cascaded Connection. 520
Pulse Output ....................................... 515
TCNT Incrementation Timing ............ 516
8-Bit Timers............................................ 507
A/D Converter ........................................ 661
A/D Conversion Time......................... 670
A/D Converter Activation................... 468
External Trigger.................................. 673
Scan Mode .......................................... 669
Single Mode........................................ 669
Address Space........................................... 28
Addressing Mode...................................... 49
Absolute Address.................................. 50
Immediate ............................................. 51
Memory Indirect ................................... 51
Program-Counter Relative .................... 51
Register Direct...................................... 49
Register Indirect.................................... 49
Register Indirect with Displacement..... 50
Register Indirect with Post-Increment .. 50
Register indirect with pre-decrement.... 50
Bcc............................................................ 45
Bus Controller......................................... 119
Basic Bus Interface............................. 150
Basic Timing....................................... 153
DRAM Interface ................................. 165
Read Strobe (RD) Timing................... 162
BusController
Valid Strobes.......................................152
Clock Pulse Generator ............................813
PLL Circuit .........................................818
Condition Field .........................................47
Condition-Code Register...........................32
CPU Operating Modes..............................24
Advanced Mode ....................................26
Normal Mode........................................24
D/A Converter......................................... 681
Data Tranfer Controller
Block Transfer Mode .......................... 310
Data Transfer Controller .........................293
Activation by Software .......................316
Chain Transfer .................................... 311
Chain Transfer when Counter = 0....... 318
DTC Vector Table...............................302
Interrupts............................................. 312
Location of Register Information........302
Normal Mode.............................. 308, 317
Repeat Mode ....................................... 309
Software Activation ............................320
DMA Controller......................................213
Activation by Auto-Request................ 243
Activation by External Request ..........242
Full Address Mode..............................268
Interrupt Sources.................................287
Repeat Mode ....................................... 252
Sequential Mode ................................. 246
Short Address Mode............................267
Single Address Mode .......................... 256
Transfer Modes ................................... 244
Effective Address.......................... 49, 52, 53
Effective Address Extension.....................47
Exception Handling...................................79
Interrupts............................................... 84
Reset exception handling ......................81
Stack Status after Exception Handling..86