Datasheet

Appendix
Rev.6.00 Mar. 18, 2009 Page 974 of 980
REJ09B0050-0600
Instruction 1 2 3 4 5 6 7 8 9
XOR.L
ERs,ERd
R:W 2nd R:W
NEXT
XORC
#xx:8,CCR
R:W
NEXT
XORC
#xx:8,EXR
R:W 2nd R:W
NEXT
Reset
exception
handling
Advanced R:W:M
VEC
R:W
VEC+2
1 state of
internal
operation
R:W
*
4
Interrupt
exception
handling
Advanced R:W
*
5
1 state of
internal
operation
W:W
Stack (L)
W:W
Stack
(H)
W:W
Stack
(EXR)
R:W:M
VEC
R:W
VEC+2
1 state of
internal
operation
R:W
*
6
Notes: 1. EAs is the ER5 value and EAd the ER6 value. 1 is added to each of them after
execution.
n is the initial value of R4L or R4, and the processing is not executed when n = 0.
2. Repeated two times when two registers are stored/retrieved, three times when three
registers are stored/retrieved, and four times when four registers are stored/retrieved.
3. Start address on returning.
4. Start address of program.
5. Prefetch address that is obtained by adding 2 to the saved PC.
Reading is not performed on returning from sleep mode or software standby mode, and
this is regarded as internal operation.
6. Start address of interrupt handling routine.
7. Registers ER0, ER1, ER4, and ER5 are used for a TAS instruction.
8. Registers ER0 to ER6 are used for an STM/LDM instruction.