Datasheet

Section 19 Power-Down Modes
Rev.7.00 Feb. 14, 2007 page 801 of 1108
REJ09B0089-0700
Section 19 Power-Down Modes
19.1 Overview
In addition to the normal program execution state, the chip has five power-down modes in which
operation of the CPU and oscillator is halted and power dissipation is reduced. Low-power
operation can be achieved by individually controlling the CPU, on-chip supporting modules, and
so on.
The chip operating modes are as follows:
1. High-speed mode
2. Medium-speed mode
3. Sleep mode
4. Module stop mode
5. Software standby mode
6. Hardware standby mode
Of these, 2 to 6 are power-down modes. Sleep mode is a CPU mode, medium-speed mode is a
CPU and bus master mode, and module stop mode is an on-chip supporting module mode
(including bus masters other than the CPU). A combination of these modes can be set.
After a reset, the chip is in high-speed mode.
Table 19.1 shows the conditions for transition to the various modes, the status of the CPU, on-chip
supporting modules, etc., and the method of clearing each mode.