Datasheet

Section 17 ROM
Rev.7.00 Feb. 14, 2007 page 643 of 1108
REJ09B0089-0700
Bit 6
SWE2 Description
0 Writes disabled (Initial value)
1 Writes enabled
Bit 5—Erase Setup Bit 2 (ESU2): Prepares for a transition to erase mode for addresses H'040000
to H'07FFFF. Do not set the SWE2, PSU2, EV2, PV2, E2, or P2 bit at the same time.
Bit 5
ESU2 Description
0 Erase setup cleared (Initial value)
1 Erase setup
[Setting condition]
When SWE2 = 1
Bit 4—Program Setup Bit 2 (PSU2): Prepares for a transition to program mode for addresses
H'040000 to H'07FFFF. Do not set the SWE2, ESU2, EV2, PV2, E2, or P2 bit at the same time.
Bit 4
PSU2 Description
0 Program setup cleared (Initial value)
1 Program setup
[Setting condition]
When SWE2 = 1
Bit 3—Erase-Verify 2 (EV2): Selects erase-verify mode transition or clearing for addresses
H'040000 to H'07FFFF. Do not set the SWE2, ESU2, PSU2, PV2, E2, or P2 bit at the same time.
Bit 3
EV2 Description
0 Erase-verify mode cleared (Initial value)
1 Transition to erase-verify mode
[Setting condition]
When SWE2 = 1