Datasheet

Section 12 Serial Communication Interface (SCI)
Rev.7.00 Feb. 14, 2007 page 459 of 1108
REJ09B0089-0700
12.2.10 Module Stop Control Register (MSTPCR)
MSTPCRH MSTPCRL
Bit : 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value : 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1
R/W : R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
MSTPCR is a 16-bit readable/writable register that performs module stop mode control.
When the corresponding bit of bits MSTP6 to MSTP5 is set to 1, SCI operation stops at the end of
the bus cycle and a transition is made to module stop mode. Registers cannot be read or written to
in module stop mode. For details, see section 19.5, Module Stop Mode.
MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 6—Module Stop (MSTP6): Specifies the SCI channel 1 module stop mode.
Bit 6
MSTP6 Description
0 SCI channel 1 module stop mode cleared
1 SCI channel 1 module stop mode set (Initial value)
Bit 5—Module Stop (MSTP5): Specifies the SCI channel 0 module stop mode.
Bit 5
MSTP5 Description
0 SCI channel 0 module stop mode cleared
1 SCI channel 0 module stop mode set (Initial value)