Datasheet
Section 11 Watchdog Timer
Rev.7.00 Feb. 14, 2007 page 427 of 1108
REJ09B0089-0700
11.3.4 Timing of Watchdog Timer Overflow Flag (WOVF) Setting
The WOVF flag is set to 1 if TCNT overflows during watchdog timer operation. At the same time,
the WDTOVF signal
*
goes low. If TCNT overflows while the RSTE bit in RSTCSR is set to 1, an
internal reset signal is generated for the entire chip. Figure 11.7 shows the timing in this case.
Note: * The WDTOVF output function is not available in the F-ZTAT versions.
φ
TCNT
Note: * The WDTOVF output function is not available in the F-ZTAT versions.
H'FF H'00
Overflow signal
(internal signal)
WOVF
WDTOVF signal*
Internal reset
signal
132 states
518 states
Figure 11.7 Timing of WOVF Setting










