Datasheet
Section 9 16-Bit Timer Pulse Unit (TPU)
Rev.7.00 Feb. 14, 2007 page 320 of 1108
REJ09B0089-0700
Channel
Bit 7
IOB3
Bit 6
IOB2
Bit 5
IOB1
Bit 4
IOB0
Description
1 0 0 0 0 Output disabled (Initial value)
1
0 output at compare match
1 0
1 output at compare match
1
TGR1B
is output
compare
register
Initial output is 0
output
Toggle output at compare
match
1 0 0 Output disabled
1 0 output at compare match
1 0
Initial output is 1
output
1 output at compare match
1
Toggle output at compare
match
1 0 0 0 Input capture at rising edge
1 Input capture at falling edge
1 ×
Capture input
source is
TIOCB1 pin
Input capture at both edges
1 × ×
TGR1B
is input
capture
register
Capture input
source is TGR0C
compare match/
input capture
Input capture at generation of
TGR0C compare match/input
capture
×: Don’t care
Channel
Bit 7
IOB3
Bit 6
IOB2
Bit 5
IOB1
Bit 4
IOB0
Description
2 0 0 0 0 Output disabled (Initial value)
1
0 output at compare match
1 0
1 output at compare match
1
TGR2B
is output
compare
register
Initial output is 0
output
Toggle output at compare
match
1 0 0 Output disabled
1 0 output at compare match
1 0
Initial output is 1
output
1 output at compare match
1 Toggle output at compare
match
0 Input capture at rising edge 0
1 Input capture at falling edge
1 ×
1 ×
TGR2B
is input
capture
register
Capture input
source is
TIOCB2 pin
Input capture at both edges
×: Don’t care










