Datasheet

Section 8 I/O Ports
Rev.7.00 Feb. 14, 2007 page 234 of 1108
REJ09B0089-0700
Pin Selection Method and Pin Functions
P10/TIOCA0/
A20
The pin function is switched as shown below according to the combination of
the operating mode, TPU channel 0 setting (by bits MD3 to MD0 in TMDR0,
bits IOA3 to IOA0 in TIOR0H, and bits CCLR2 to CCLR0 in TCR0), bit A20E in
PFCR1 and bit P10DDR.
Operating
Mode
Mode 7
*
1
Modes 4 to 6
*
1
TPU Channel
0 Setting
Table
Below (1)
Table
Below (2)
Table
Below (1)
Table
Below (2)
P10DDR 0 1 0 1 0 1
A20E 0 1 0 1
Pin function TIOCA0
output
P10
input
P10
output
TIOCA0
output
TIOCA0
output
A20
output
P10
input
P10
output
A20
output
TIOCA0
input
*
2
TIOCA0
input
*
2
TPU Channel
0 Setting
(2)
(1)
(2)
(1)
(1)
(2)
MD3 to MD0 B'0000 B'001× B'0010 B'0011
IOA3 to IOA0 B'0000
B'0100
B'1×××
B'0001 to
B'0011
B'0101 to
B'0111
B'××00 Other than B'××00
CCLR2 to
CCLR0
— — — — Other
than
B'001
B'001
Output
function
— Output
compare
output
— PWM
mode 1
output
*
3
PWM
mode 2
output
×: Don’t care
Notes: 1. Modes 6 and 7 are not available in the ROMless versions.
2. TIOCA0 input when MD3 to MD0 = B'0000 and IOA3 to IOA0 =
B'10××.
3. TIOCB0 output is disabled.