Datasheet

Section 3 MCU Operating Modes
Rev.7.00 Feb. 14, 2007 page 96 of 1108
REJ09B0089-0700
Modes 4 and 5
(advanced expanded modes
with on-chip ROM disabled)
Mode 6
(advanced expanded mode
with on-chip ROM enabled)
Mode 7
(advanced single-chip
mode)
External address
space
External address
space
On-chip ROM
On-ch
ip RAM
*3
On-chip RAM
*3
Reserved area
*4
Reserved area
*4
Reserved area
*4
On-chip RAM
Reserved area
*5
Notes: 1. External addresses when EAE = 1 in BCRL; on-chip ROM when EAE = 0.
2. Reserved area when EAE = 1 in BCRL; on-chip ROM when EAE = 0.
3. External addresses can be accessed by clearing the RAME bit in SY
SCR to 0.
4. Do not access the reserved area in addresses H'060000 to H'07FFFF.
5. Do not access the reserved areas.
Internal
I/O registers
On-chip ROM
On-chip ROM/
reserved
area
*2 *5
External address
space
External address
space
Internal
I/O registers
External address
space
Internal
I/O registers
External address
space
Internal
I/O registers
Internal
I/O registers
Internal
I/O registers
External address
space
H'000000 H'000000 H'000000
H'080000
H'FFFC00
H'FFEC00
H'FFFFFF
H'080000
H'060000
H'060000
H'060000
H'FFFBFF
H'FFEC00
H'FFFFFF
H'FFFF08
H'FFFE50
H'FFFF07
H'FFFF28
H'FFFF28
On-chip ROM/
external address
space
*1
H'FFFE50
H'010000
H'010000
H'07FFFF
H'FFDC00
H'FFDC00
H'FFDC00
H'FFFC00
Reserved area
*5
Reserved area
*5
H'FFEC00
H'FFFFFF
H'FFFF08
H'FFFF28
H'FFFE50
Figure 3.7 (a) H8S/2314 Memory Map in Each Operating Mode