Datasheet

Appendix B Internal I/O Registers
Rev.7.00 Feb. 14, 2007 page 989 of 1108
REJ09B0089-0700
BCRL—Bus Control Register L H'FED5 Bus Controller
7
BRLE
0
R/W
6
BREQOE
0
R/W
5
EAE
1
R/W
4
⎯
1
R/W
3
⎯
1
R/W
0
WAITE
0
R/W
2
⎯
1
R/W
1
⎯
0
R/W
Bit
Initial value
Read/Write
:
:
:
Bus Release Enable
0
1
External bus release disabled
External bus release enabled
BREQO Pin Enable
0
1
BREQO output disabled
BREQO output enabled
0
1
Addresses H'010000 to H'03FFFF
*2
:
• H8S/2319, H8S/2319C, H8S/2315, and H8S/2314: On-chip ROM
• H8S/2318: On-chip ROM
• H8S/2317, H8S/2317S: On-chip ROM at addresses H'010000 to H'01FFFF
and reserved area
*1
at addresses H'020000 to H'03FFFF
• H8S/2316S: Reserved area
*1
Addresses H'010000 to H'03FFFF
*2
:
• Expanded mode: External addresses
• Single-chip mode: Reserved area
*1
External Address Enable
Reserved
Only 0 should be written to this bit.
WAIT Pin Enable
0
1
Wait input by WAIT pin
disabled
Wait input by WAIT pin
enabled
Notes: 1. Do not access a reserved area.
2. H'010000 to H'03FFFF in the H8S/2318, H'010000 to H'05FFFF
in the H8S/2315 and H8S/2314, and H'010000 to H'07FFFF in the
H8S/2319 and H8S/2319C.
Reserved
Only 1 should be written to these bits.