Datasheet

Section 23 Clock Pulse Generator
Rev. 6.00 Mar. 18, 2010 Page 778 of 982
REJ09B0054-0600
This LSI
Port output
External
interrupt
EXTAL
External clock 1
External clock 2
Selector
Control
circuit
External clock switch request
External interrupt signal
External clock switch signal
Figure 23.6 External Clock Switching Circuit (Example)
200 ns or more
(2)
(1) Port output (clock switching)
(2) Transition to software standby mode
(3) External clock switching
(4) External interrupt generation
(An interrupt should be input 200 ns or more after transition to software standby mode.)
(5) Interrupt exception handling
(5)
SLEEP instruction
execution
Interrupt exception handling
Operation
External
clock 1
External
clock 2
(1)
Port output
(3)
External
clock
switching
circuit
EXTAL
Internal
clock
φ
(4)
standby time
External
interrupt
Active (External clock 1)Active (External clock 2) Software standby mode
Clock switching
request
Figure 23.7 External Clock Switching Timing (Example)