Datasheet

Section 18 D/A Converter
Rev. 6.00 Mar. 18, 2010 Page 707 of 982
REJ09B0054-0600
Section 18 D/A Converter
18.1 Features
• 8-bit resolution
• Two output channels
• Conversion time: 10 µs, maximum (when load capacitance is 20 pF)
• Output voltage: 0 V to Vref
• Module stop mode can be set
Note: The D/A converter is not included in the H8S/2227 Group.
Module data bus Internal data bus
Bus interface
Vref
AVCC
DA1
DA0
AVSS
8-bit D/A
Control circuit
Legend:
DACR: D/A control register
DADR0: D/A data register 0
DADR1: D/A data register 1
DADR0 DADR1
DACR
Figure 18.1 Block Diagram of D/A Converter
DAC0004C_000020020700