Datasheet

Section 17 A/D Converter
Rev. 6.00 Mar. 18, 2010 Page 695 of 982
REJ09B0054-0600
17.3.3 A/D Control Register (ADCR)
The ADCR enables A/D conversion started by an external trigger signal.
Bit Bit Name
Initial Value
R/W Description
7
6
TRGS1
TRGS0
0
0
R/W
R/W
Timer Trigger Select 1 and 0
Enables the start of A/D conversion by a trigger
signal. Only set bits TRGS0 and TRGS1 while
conversion is stopped (ADST = 0).
00: A/D conversion start by software is enabled
01: A/D conversion start by TPU conversion start
trigger is enabled
10: A/D conversion start by 8-bit timer conversion
start trigger is enabled
11: A/D conversion start by external trigger pin
(ADTRG) is enabled
5, 4 — All 1 — Reserved
These bits are always read as 1 and cannot be
modified.
3
2
CKS1
CKS0
0
0
R/W
R/W
Clock Select 1 and 0
These bits specify the A/D conversion time. The
conversion time should be changed only when
ADST = 0. Specify a setting that gives a value within
the range shown in table 27.10 (H8S/2258 Group),
table 27.23 (H8S/2239 Group), table 27.35
(H8S/2238B and H8S/ 2236B), table 27.47
(H8S/2238R and H8S/ 2236R), or table 27.57
(H8S/2237 Group and H8S/2227 Group).
00: Conversion time = 530 states (max)
01: Conversion time = 266 states (max)
10: Conversion time = 134 states (max)
11: Conversion time = 68 states (max)
1, 0 ⎯ All 1 ⎯ Reserved
These bits are always read as 1 and cannot be
modified.