Datasheet

Section 16 I
2
C Bus Interface (IIC) (Option)
Rev. 6.00 Mar. 18, 2010 Page 663 of 982
REJ09B0054-0600
(1) The flag is set at the falling edge of the 8th clock cycle of the receive clock for 1 frame.
SCL is automatically held low, in synchronization with the internal clock, until the IRIC
flag is cleared.
(2) The flag is set at the rising edge of the 9th clock cycle of the receive clock for 1 frame.
The IRTR flag is set to 1, indicating that reception of 1 frame of data has ended. The
master device continues to output the receive clock for the receive data.
[13] Read the IRTR flag in ICSR. If the IRTR flag value is 0, the wait state is cancelled by
clearing the IRIC flag as described in step [14] below. If the IRTR flag value is 1 and the
receive operation has finished, perform the issue stop condition processing described in step
[15] below.
[14] If the IRTR flag value is 0, clear the IRIC flag to 0 to cancel the wait state. Return to reading
the IRIC flag, as described in step [12], to detect the end of the receive operation.
[15] Clear the WAIT bit in ICMR to 0 to cancel the wait mode. Then clear the IRIC flag to 0. The
IRIC flag should be cleared when the value of WAIT is 0. (The stop condition may not be
output properly when the issue stop condition instruction is executed if the WAIT bit was
cleared to 0 after the IRIC flag is cleared to 0.)
[16] Read the final receive data in ICDR.
[17] Write 0 to BBSY and SCP in ICCR. This changes SDA from low to high when SCL is high,
and generates the stop condition.
19
A
2345 12345678 9
Data 1
Data 1
Master receive modeMaster transmit mode
Data 2
[3]
[3]
A
[4] IRTR = 1[4] IRTR = 0
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3Bit 2 Bit 1 Bit 0
SCL
(master output)
SDA
(slave output)
SDA
(master output)
IRIC
IRTR
ICDR
User processing
[1] TRS cleared to 0
IRIC clearance
[2] ICDR read (dummy read)
[6] IRIC clearance
(cancel wait)
[5] ICDR read
(data 1)
[6] IRIC clearance
Figure 16.12 Example of Master Receive Mode Operation Timing
(MLS = ACKB = 0, WAIT = 1)