Datasheet

Section 15 Serial Communication Interface (SCI)
Rev. 6.00 Mar. 18, 2010 Page 615 of 982
REJ09B0054-0600
D0 D1 D2 D3 D4 D5 D6 D7 Dp DE Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
(DE)
Ds
D0 D1 D2 D3 D4Ds
Transfer
frame n + 1st
Retransferred framenth transfer frame
TDRE
TEND
FER/ERS
Transfer to TSR from TDR Transfer to TSR from TDR
Transfer to TSR
from TDR
Figure 15.29 Retransfer Operation in SCI Transmit Mode
The timing for setting the TEND flag depends on the value of the GM bit in SMR. The TEND flag
set timing is shown in figure 15.30.
Ds D0 D1 D2 D3 D4 D5 D6 D7 DpI/O data
12.5 etu
TXI
(TEND interrupt)
11.0 etu
DE
Guard
time
When GM = 0
When GM = 1
Start bit
Data bits
Parity bit
Error signal
Legend:
Ds:
D7 to D0:
Dp:
DE:
Figure 15.30 TEND Flag Generation Timing in Transmission Operation