Datasheet

Section 15 Serial Communication Interface (SCI)
Rev. 6.00 Mar. 18, 2010 Page 549 of 982
REJ09B0054-0600
Figure 15.1 shows a block diagram of the SCI (except SCI_0 of the H8S/2239 Group), and figure
15.2 shows that of the SCI_0 of the H8S/2239 Group.
RxD
TxD
SCK
Clock
External clock
φ
φ/4
φ/16
φ/64
TEI
TXI
RXI
ERI
RSR:
RDR:
TSR:
TDR:
SMR:
SCR:
SSR:
SCMR:
BRR:
Receive shift register
Receive data register
Transmit shift register
Transmit data register
Serial mode register
Serial control register
Serial status register
Smart card mode register
Bit rate register
SCMR
SSR
SCR
SMR
Transmission/
reception control
Baud rate
generator
BRR
Module data bus
Bus interface
RDR
TSRRSR
Parity generation
Parity check
Legend:
TDR
Internal
data bus
Figure 15.1 Block Diagram of SCI