Datasheet

Rev. 6.00 Mar. 18, 2010 Page li of lx
REJ09B0054-0600
Figure 27.5 Power Supply Voltage and Operating Ranges
(H8S/2237 Group and H8S/2227 Group).............................................................843
Figure 27.6 Output Load Circuit .............................................................................................853
Figure 27.7 I
2
C Bus Interface Input/Output Timing (Optional)...............................................859
Figure 27.8 Output Load Circuit .............................................................................................873
Figure 27.9 Output Load Circuit .............................................................................................896
Figure 27.10 System Clock Timing...........................................................................................948
Figure 27.11 Oscillation Stabilization Timing ..........................................................................948
Figure 27.12 Reset Input Timing...............................................................................................949
Figure 27.13 Interrupt Input Timing..........................................................................................949
Figure 27.14 Basic Bus Timing (Two-State Access) ................................................................950
Figure 27.15 Basic Bus Timing (Three-State Access)...............................................................951
Figure 27.16 Basic Bus Timing (Three-State Access with One Wait State) .............................952
Figure 27.17 Burst ROM Access Timing (Two-State Access)..................................................953
Figure 27.18 Burst ROM Access Timing (One-State Access) ..................................................954
Figure 27.19 External Bus Release Timing...............................................................................954
Figure 27.20 DMAC Single Address Transfer Timing (Two-State Access).............................955
Figure 27.21 DMAC Single Address Transfer Timing (Three-State Access)...........................956
Figure 27.22 DMAC TEND Output Timing .............................................................................957
Figure 27.23 DMAC DREQ Input Timing................................................................................957
Figure 27.24 I/O Port Input/Output Timing ..............................................................................957
Figure 27.25 TPU Input/Output Timing....................................................................................958
Figure 27.26 TPU Clock Input Timing......................................................................................958
Figure 27.27 8-Bit Timer Output Timing..................................................................................958
Figure 27.28 8-Bit Timer Clock Input Timing..........................................................................959
Figure 27.29 8-Bit Timer Reset Input Timing...........................................................................959
Figure 27.30 WDT_1 Output Timing........................................................................................959
Figure 27.31 SCK Clock Input Timing .....................................................................................959
Figure 27.32 SCI Input/Output Timing (Clocked Synchronous Mode) ....................................960
Figure 27.33 A/D Converter External Trigger Input Timing ....................................................960
Figure 27.34 I
2
C Bus Interface Input/Output Timing (Optional)...............................................960
Appendix C Package Dimensions
Figure C.1 TFP-100B Package Dimensions...........................................................................973
Figure C.2 TFP-100G Package Dimensions ..........................................................................974
Figure C.3 FP-100A Package Dimensions.............................................................................975
Figure C.4 FP-100B Package Dimensions.............................................................................976
Figure C.5 BP-112 Package Dimensions ...............................................................................977
Figure C.6 TBP-112A, TBP-112AV Package Dimensions....................................................978