Datasheet

Section 10 I/O Ports
Rev. 6.00 Mar. 18, 2010 Page 328 of 982
REJ09B0054-0600
10.6 Port A
Port A is a 4-bit I/O port and has the following register.
• Port A data direction register (PADDR)
• Port A data register (PADR)
• Port A register (PORTA)
• Port A pull-up MOS control register (PAPCR)
• Port A open drain control register (PAODR)
10.6.1 Port A Data Direction Register (PADDR)
PADDR specifies input or output the port A pins using the individual bits. PADDR cannot be
read; if it is, an undefined value will be read. This register is a write-only register, and cannot be
written by bit manipulation instruction. For details, see section 2.9.4, Access Methods for
Registers with Write-Only Bits.
Bit Bit Name Initial Value R/W Description
7 to 4 — Undefined — Reserved
These bits are always read as undefined value.
3 PA3DDR 0 W
2 PA2DDR 0 W
1 PA1DDR 0 W
When a pin is specified as a general purpose I/O
port, setting this bit to 1 makes the corresponding
port A pin an output pin. Clearing this bit to 0 makes
the pin an input pin.
0 PA0DDR 0 W
10.6.2 Port A Data Register (PADR)
PADR stores output data for port A pins.
Bit Bit Name Initial Value R/W Description
7 to 4 — Undefined — Reserved
These bits are always read as undefined value.
3 PA3DR 0 R/W
2 PA2DR 0 R/W
1 PA1DR 0 R/W
Output data for a pin is stored when the pin is
specified as a general purpose output port.
0 PA0DR 0 R/W