Datasheet

Section 3 MCU Operating Modes
Rev. 6.00 Mar. 18, 2010 Page 114 of 982
REJ09B0054-0600
H'000000
H'FFB000
H'FFEFC0
H'020000
H'000000
H'01FFFF
H'000000
H'FFB000
H'FFEFBF
H'FFFF40
H'FFFF60
H'FFFFC0
H'FFFFFF
H'FFF800
H'FFB000
H'FFEFC0
H'FFFF40
H'FFFF60 H'FFFF60
H'FFFFC0
H'FFFFFF
H'FFF800
H'FFFF3F
H'FFFFFF
H'FFF800
H'FFFFC0
Modes 4 and 5
(advanced extended modes
with on-chip ROM disabled)
Mode 6
(advanced extended mode
with on-chip ROM enabled)
Mode 7
(advanced single-chip mode)
External address
space
Note: * Extermal addresses can be accessed by clearing the RAME bit in SYSCR to 0.
External address
space
External address
space
On-chip RAM*
Internal I/O registers
On-chip RAM*
External address
space
External address
space
On-chip ROM
On-chip RAM*
Internal I/O registers
External address
space
On-chip RAM*
On-chip ROM
On-chip RAM
Internal I/O registersInternal I/O registersInternal I/O registers
Internal I/O registers
On-chip RAM
Figure 3.6 H8S/2237 and H8S/2227 Memory Map in Each Operating Mode