Datasheet

Appendix A I/O Port States in Each Pin State
Rev. 6.00 Mar. 18, 2010 Page 964 of 982
REJ09B0054-0600
Port Name
Pin Name
MCU
Operating
Mode
Power-On
Reset
Manual
Reset
Hardware
Standby
Mode
Software
Standby
Mode,
Watch Mode
Bus
Mastership
Release
State
Program
Execution
State,
Sleep Mode,
Subsleep
Mode
Port 3 4 to 7 T keep T keep keep I/O port
Port 4 4 to 7 T T T T T Input port
P77 to P74 4 to 7 T keep T keep keep I/O port
7 T keep T keep keep I/O port P73/TMO1/
TEND1*
3
/CS7
P72/TMO0/
TEND0*
3
/CS6
P71/TMRI23*
2
/
TMCI23*
2
/
DREQ1*
3
/CS5
P70/TMRI01/
TMCI01/
DREQ0*
3
/CS4
4 to 6 T keep T [DDR ⋅ OPE
= 0]
T
[DDR ⋅ OPE
= 1]
H
T [DDR = 0]
Input port
[DDR = 1]
CS7 to CS4
P97/DA1*
4
P96/DA0*
4
4 to 7 T T T [DAOEn = 1]
keep
[DAOEn = 0]
T
keep Input port
7 T keep T keep keep I/O port
4, 5 L
Port A
When
the
address
output is
selected
by the
AEn bit
6 T
keep T [OPE = 0]
T
[OPE = 1]
keep
T Address
output
When a
port is
selected
4 to 6 T*
1
keep T keep keep I/O port